| Venue | ： | Seminar Venue D |
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Lead frames for semiconductor components must do more than electrically connect elements and circuits.
One method of improving joint reliability is to apply coarse plating films on lead frames; however, sufficient adhesion performance has not yet been achieved.
To address this issue, we have investigated a plating process to provide granular copper process by PR pulse plating. Through this investigation, we have successfully developed a treatment method and the optimal additives that provide the copper film with a high surface area ratio(S-ratio).
The deposit shows a strong adhesion to the molding resin, as well as exhibits the shear strength comparable to the shear failure of the resin itself.
Here, we introduce our new product, TOP CLUSTER AR, an additive that promises high reliability of the devices such as power semiconductors used in harsh conditions.
Apply via the following:
TEL: 06-6961-0886
FAX: 06-6961-7037
E-mail: m-horikawa01@okuno.co.jp
| Venue | ： | Seminar Venue D |
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As an engineer, he has experience in electronic circuit design and
development project management in a wide range of fields including mobile cameras,
CIS testers, liquid crystal displays, and automobile lamps.
He has experience in organizational management that utilizes offshore resources,
and has built a development system that balances quality and cost reduction.
He joined V Technology in 2022 and is engaged in launching an IT business by
leveraging his past consulting experience for the manufacturing industry.
Towards 2030, we in the manufacturing industry face a variety of challenges: promoting DX, realizing GX and dealing with Human Resource Shortages are these are important factors that must be addressed in order to ensure sustainable business activities in the future.
Since establishing its IT technology infrastructure in 2022, V-Technology, as a member of the manufacturing industry, has been making use of its know-how and have been seeking ways to tackle these challenges from the IT side.
We are pleased to announce that the manufacturing industry is now working to achieve an optimum smart factory.
Our development experience will provide suggestions on how to tackle these challenges.
We hope that we can take a new step forward together with you to build a sustainable future.
To attend, please come directly to the venue
| Venue | ： | Seminar Venue D |
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To attend, please come directly to the venue
お名刺を1枚頂戴いたします。
| Venue | ： | Seminar Venue D |
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The latest information about the recent tool developments and future prospects of PCB drilling and routing based on user's needs by PCB applications.
Apply via the following:
TEL: 03-5493-1020
５月中旬より弊社HPにてお申込み受付を予定しております。是非ご覧ください。
| Venue | ： | Seminar Venue D |
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Graduated from the Department of Electrical Engineering of Seikei University (major: magnetic field distribution in superconducting generators)
1987 Joined Nissei Sangyo Co., Ltd. (currently Hitachi High-Tech) and engaged in the current Renesas semiconductor sales business as a sales and a sales engineer
Stationed overseas12 years in Korea and 3 years in the US
Founded WFC in 2013 as CEO
Specialized fields are Semiconductors (especially non-memory), LCDs, Touch panels, and functional materials.
My hobbies are skiing, sailing, tennis, and rugby.
My dream is to implement IH reflow in society and travel around Japan on a yacht
We aim to implement 3D-MID/PE in society using IH reflow, which is our core technology.
Customers who require 3D-MID/PE need to know the substrate (molded product/PET film/PI film), circuit method (Printing/Cu etching), bonding material (low/high melting point solder/conductive adhesive), and mounting. It is necessary to decide on each process, such as (reflow oven/jet flow/laser/hand soldering), parts (whether they are heat resistant), etc. Of course, achieving this will take time.
We provide total solution support for 3D-MID/PE by collaborating with manufacturers of each process from the standpoint of the mounting process "IH reflow" and supporting our customers.
In addition, IH reflow consumes electricity only during heating, resulting in significantly lower power consumption than existing mounting methods.
Would you like to work with us to develop electronic boards using 3D-MID/PE and at the same time realize the decarbonization in the electronic board manufacturing market?
To attend, please come directly to the venue
| Venue | ： | Seminar Venue D |
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| Venue | ： | Seminar Venue D |
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As a former smartphone designer, I practiced design that fully utilized various simulations.
Currently, I support design sites as a consultant for thermal design of electronic devices based on my wide range of knowledge covering from simulation utilization to actual measurement techniques, which I have cultivated through my design experience.
Thermal design is becoming increasingly challenging due to the miniaturization of electronic devices and their increasing power consumption. Against this background, front-loading of thermal design is becoming increasingly important.
To do this, it is necessary to confirm the validity of the heat dissipation structure early in the design process, and the use of thermal simulation tools is essential to respond flexibly to changes in components and specifications.
In order to realize front-loading of thermal design using thermal simulation tools, it is important to manage the purpose and analysis accuracy of thermal simulation at each development stage.
This presentation will show how to effectively utilize Simcenter Flotherm and Flotherm XT in the thermal design flow.
To attend, please come directly to the venue
| Venue | ： | Seminar Venue D |
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| Venue | ： | Seminar Venue D |
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To attend, please come directly to the venue
確定次第ご案内いたします。
| Venue | ： | Seminar Venue D |
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Catalyzed aluminum foil is a carrier (sacrificial) foil that can be laminated to various resin films to transfer and impart a surface shape and catalyst layer optimal for ultra-fine wiring. After completing the development and verification phases, this technology has entered the diffusion phase. In this report, we present its progress and future prospects.
To attend, please come directly to the venue
| Venue | ： | Seminar Venue D |
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Heterogeneous Integration, which integrates multiple heterogeneous chips on an interposer, is a key technology for increasing the functionality of semiconductors. Interposers are required to have lower CTE (The value close to that of a chip), fine connections, and larger size due to an increase in the number of mounted chips. In this seminar, we propose an organic interposer with a simple coreless structure developed by TOPPAN Inc.
To attend, please come directly to the venue